A Generalized Space Vector Modulation for Cascaded H-Bridge Inverters under Faulty Conditions

Nội dung text: A Generalized Space Vector Modulation for Cascaded H-Bridge Inverters under Faulty Conditions

1. JST: Smart Systems and Devices Volume 31, Issue 2, September 2021, 092-099 A Generalized Space Vector Modulation for Cascaded H-Bridge Inverters under Faulty Conditions Mai Van Chung1,2, Truong Viet Hoang1, Nguyen Van Cao1, Nguyen Manh Linh1*, 1 1 Vu Hoang Phuong , Nguyen Van Lien 1 Hanoi University of Science and Technology, Hanoi, Vietnam 2 Hung Vuong University, Phutho, Vietnam *Email: linh.nguyenmanh@hust.edu.vn Abstract In this research, a new space vector modulation control algorithm is proposed to increase the reliability and the accuracy of the cascaded H-bridge multilevel inverters in case of faulty situations where one or several power cells do not function. When one or more switches of a cell are opened or shorted, that cell is considered faulty. By giving a detailed analysis on the impact of the faulty power cells on the voltage space vectors, the inapplicable voltage vectors are removed precisely. Consequently, the optimal redundant switching states are chosen such that the highest possible output voltage can be achieved. In addition, the balance of the three phases line-to-line voltage and current are maintained. The proposed algorithm is also generalized so that it can be applied to any level of H-bridge inverters. The validity of the method is verified by numerical simulations using MATLAB Simulink with an 11-level cascaded H-bridge inverter. Keywords: Cascaded H-bridge inverter; space vector modulation (SVM); fault tolerant operation of CHB multilevel inverters 1. Introduction1 the generalized SVM algorithm [16-20], the implementation of SVM for H-bridge inverter with Multi-level inverters have been widely used in any number of levels on digital control platform has industrial applications with high voltage range, large become much easier. capacity due to following advantages: lower total harmonics distortion (THD) at output current/voltage As the number of levels is increased, e.g., in waveform, lower voltage drop and stress on power medium and high voltage applications, the possibility switches, low dv/dt and high reliability since the faulty of malfunction caused by faulty power switches is module can be bypass in several particular situation unavoidable [9]. Normally, the inverter is [1,2] The topology of cascaded H-bridge multilevel disconnected from the line/load by the protection inverter (CHB) is described in detail in [3-8]. In system, resulting in a sudden stop of motors which comparison with the diode - clamped topology, CHB- may cause other serious problems, e.g., water hammer based inverter is more popular in industry due to its in pump system. Besides, if the inverter continues to high modularization, as well as its ability to use the work under faulty conditions, the output voltage can redundancy voltage vectors to solve the multi- be unbalanced, leading to motor failure after operating objective optimization problem [9]. for a long period of time. Therefore, modulation strategy in faulty conditions to maintain proper With a large number of power switches and operation of the inverter is a challenging issue. complicated topology, modulation strategy for multi- level inverters is a challenge, especially when the The "bypass cell" method which bypasses the number of levels is high. Among all modulation cell that contains the faulty switches is suggested in strategies, the space vector modulation (SVM), which [21]. This method is quite simple, easy to implement, has been widely used for conventional 3-phase and can generate balance voltage between phases. inverters, can also be applied to CHB topology with However, the corresponding cells in the other phases the superior performance although high computational must also be removed, leading to the reduction of the cost is required. By using SVM, the multiple- output voltage. To overcome this drawback, the objectives problems such as: switching state neutral point shifting method has been proposed optimization, load–source neutral voltage [22,23], in which, only the faulty cell is removed. As a minimization, capacitor voltage balance, phase voltage result, the output voltage is usually larger than "bypass balance can be implemented thoroughly by utilizing cell" method. Space vector modulation technique is redundancy voltage vector [10-15]. Recently, thanks to also proposed in [24] and has the same performance as ISSN: 2734-9373 Received: January 16, 2020; accepted: June 25, 2020 92
2. JST: Smart Systems and Devices Volume 31, Issue 2, September 2021, 092-099 the neutral point shifting method. However, both methods are complicated, especially when the number of levels increases. Therefore, most researches are only based on inverters with limited levels. In this research, an improvement of the generalized SVM method for the cascaded H-bridge multilevel inverter under faulty conditions is proposed. The proposed method guarantees that multiple- objectives such as: switching loss optimization, maximum output voltage, and output phase voltage balance can be achieved. 2. An Analysis on CHB under Fault Condition and Power Circuit Reconfiguration Method Fig. 2. Inverter when errors occur. 2.1. CHB structure with bypass switches Sector II h The typical configuration of a CHB inverter with bypass switches is shown in Fig. 1. Each power module is called a cell. And the CHB inverter is Sector III formed by connecting multiple cells in cascade for Sector I each phase. Since each cell is equipped with a bypass switch, the faulty cells can be removed as illustrated in Fig. 2 g 2.2. Output Voltage Effects under Fault According to [5], the output voltage vectors of Sector VI the CHB is arranged as shown in Fig. 3. When an error Sector IV occurs, some switching combination is not possible because the relevant power cell is removed. The lack of switching combination makes some voltage vectors Sector V cannot be implemented, forming a layer of faulty space voltage vectors. Fig. 3. Voltage space vectors of CHB with M levels. Fig. 4 depicts some typical examples of space vectors when one or more cells of the CHB is fail. The triangles represent the faulty vector that is unusable for the modulation. The position of faulty space vectors is summarized in Table 1. It can be seen that when a cell in phase A corrupted, some space vectors in sectors I, III, IV, and VI are affected, while the vectors in sectors II and V are not affected. a) b) c) d) Fig. 4. The effects of output voltage vectors under faulty conditions. (a) Output voltage vectors when cell A1 is faulty. (b) Output voltage vectors when cell B1 a) b) is faulty. (c) Output voltage vectors when cell A1 and Fig. 1. a. CHB with bypass switches. b. A cell in detail B1 are faulty. (d) Output voltage vectors when cell A1, B1 and C1 are faulty. 93
3. JST: Smart Systems and Devices Volume 31, Issue 2, September 2021, 092-099 Table 1. Location of space vectors affected by faulty where eI VI are the number of faulty vector layers of cells. sector I VI. Inverter phases with faulty The maximum number of faulty vector layers in Sector power cells vector space is determined as: affected Phase A Phase B Phase C emax =max(eA +++ eee BA ;e CB ;e C ) (2) I Yes No Yes The maximum possible amplitude of reference voltage corresponds to the radius of the inscribed circle II No Yes Yes of the largest hexagon which is not affected by the III Yes Yes No faulty vectors, as illustrated in Fig. 5: IV Yes No Yes 1 v'max = VMdc (1 −− emax ) (3) 3 V No Yes Yes where M is the level of the CHB. VI Yes Yes No ’ After determining v max, the new reference ’ voltage vref can be obtained by the algorithm in Fig. 6. 3. SVM Method for CHB with any Level Under Faulty Conditions. To ensure that the CHB operates properly despite the existence of a faulty power cell, an improvement of the generalized SVM method [5] is proposed, which consists of the following steps: • Calculating new reference voltage • Locating the reference voltage • Determining the modulation period • Determining the switching state • Specifying optimized switching order, switching combination of the switches. In comparison with [5], step 1 and step 4 need to Fig. 5. Calculating the maximum voltage vector can be be modified because of the influence of faulty cells. achieved in faulty CHB. The remaining steps are preserved. Therefore, this paper only focuses on step 1 and step 4. 3.1. Calculating New Reference Voltage When faulty power cells occur, some unachievable switching combinations are formed, creating a group of faulty voltage vectors. At this point, creating desired output voltage vectors may not be available if faulty vectors are used in the modulation algorithm. Therefore, the purpose of this section is to determine the number of defective layers, the Fig. 6. Alogrithm flowchart for determining reference maximum voltage value that can be modulated, voltage vref’ under faulty conditions. thereby calculating the value of new reference voltage. 3.2. Determining Switching States in Faulty Number of faulty space voltage vector layers per Conditions sector is obtained by equation (1). When there are eA, eB, eC faulty cells on phase A, = + eeeI AC B and C, repectively, the converter needs to be  = + reconstructed by shorting these faulty cells. Thereby, eII ee B C  the voltages can be created as follows: eIII= ee A + B  (1) e= ee + VAN= kV AN. dc  IV A C  e= ee + V= kV. (4)  V BC BN BN dc  = eVI= ee A + B VCN kV CN. dc 94
4. JST: Smart Systems and Devices Volume 31, Issue 2, September 2021, 092-099 Table 2. Specifying level of phases and k selection in sectors (k0=kg+kh) Sector I II III IV V VI kg kkAN− BN kkAN− CN kkBN− CN kkBN− AN kkCN− AN kkCN− BN        − − − − − − kh kkBN CN kkBN AN kkCN AN kkCN BN kkAN BN kkAN CN k k kk− kk−− k kk−−gh k kk− g AN h gh k  − −−  k kk− g k k kkh kkgh k BN kk−−gh k  k kk−−gh k kk−−gh k kk− g k k  CN  kk− h max max max max max max −+ + −+neA −+nkhA + e −+nk0 + eA nk0 eA −+nkgA + e −+neA k  −+nk + e −+ne −+ne −+ + −+nk + e −+nk + e gB B B nkhB e 0 B 0 B −+nk + e −+nk + e −+nk + e −+ne −+nk + e 0 C 0 C gC −+neC C hC Table 3. Coordinates of voltage vectors in sector I. k=max( −+ n eA ; −+ nk gB + e ; −+ nk g + k hC + e) + P1 P2 P3 P1 kg kg kg +1 kg kg      kh kh kh kh +1 kh D1 k k k +1 k +1 k +1 AN   − − −+ −+ kBN kkg kkg kkg 1 kkg 1  −− −− −− −−+ kCN kkgh k kkgh k kkgh k kkgh k 1 + P2 P3 P4 P2 kg kg +1 kg kg +1 kg +1      kh kh kh +1 kh +1 kh D2 k k +1 k +1 k + 2 k + 2 AN   − −+ −+ −+ kBN kkg kkg 1 kkg 1 kkg 1  −− −− −− −−+ kCN kkgh k kkgh k kkgh k kkgh k 1 where:  kAN ∈− ne +AA;n − e  kBN ∈− ne +BB;n − e (5)  ∈− + − kCN neCC;n e To determine the switching combinations that generate unfaulty voltage vector on vector space, steps can be done as following. With sector I: Consider a voltage vector which has the coordinates [vg; vh] illustrated in Fig. 7. This voltage vector can be represented by the equations (6) as follows: Fig.7. A sector I voltage vector representation. 95
5. JST: Smart Systems and Devices Volume 31, Issue 2, September 2021, 092-099  22 Table 4. Error assumption in 11-level CHB. v= Vk = V( k − k )  g33 dc g dc AN BN  (6) Pha xảy ra lỗi 22 v= Vk = V( k − k ) Thời gian (s) A B C  h33 dc h dc BN CN 0 - 0,05 0 0 0 From (6), we can write: 0,05 - 0,1 H A1 0 0 0,1 - 0,15 H A1 HHB13; B HHHCCC135;; kg (kkAN− BN ) =  (7) kh (kkBN− CN ) Simulation results: with kA=k, (7) can be rewritten on abc coordinate: kAN k kg  ⇒=−kBN  kkg (8) k  h −− kCN kkgh k However, these coordinates must satisfy (5), as (9): −+ne ≤ k ≤ ne −  AA −+neBgB ≤ kk − ≤ ne − (9)  −+≤−−≤−  neC kk gh k ne C From (9), (10) is given: −+ne ≤ k ≤ ne −  AA −++≤≤+−nkgB e k nkgB e (10)  −+++≤≤++−  nkghC k e k nkghC k e Fig. 8. Level state on phase A and phase B with error That means k must satisfy (11): handling algorithm. −+ne ne−  AA   max −++nkgB e  ≤≤ kmin nk +−gB e  −+++ ++−  nkghC k e  nkghC k e  (11) In other sectors, the states can be determined kg exactly same way as above, by replacing  in kh sector I by respective coordinates of these sectors, which are summarized in Table 2. Fig. 9. Output voltage on phases: UAN and UBN without error handling algorithm. By implementing the optimized switching algorithm applied for faulty cell conditions, the result can be achieved in Table 3. 4. Simulation Results To verify the correctness and effectiveness of the proposed method, simulation on Matlab – Simulink software is implemented. Specifically, the algorithm is applied to 11-level CHB inverter, the DC voltage on each cell UDC = 60V, reference voltage UA = 330sinωt, the phases are balance as the phase angles difference are 1200. Faulty cells are assumed as shown in Table 4. Error is generated by making a switch of the faulty Fig. 10. Maximum output voltage of CHB under faulty cell open, other switches keep operating normally. conditions. 96
6. JST: Smart Systems and Devices Volume 31, Issue 2, September 2021, 092-099 Fig. 11. Line voltage waveform: UAB and UBC with Fig. 13. Output voltage on load: UAz; UBz; UCz with error handling algorithm. error handling algorithm. Fig. 12. Line voltage waveform: UAB and UBC without Fig. 14. Output voltage on load: UAz; UBz; UCz without error handling algorithm. error handling algorithm. In terms of phase output voltage, we can clearly danger for the inverter. With the error handling see as Fig. 8, when phase A fails between 0.05 - 0.1s, algorithm, by adding auxiliary components and the error handling algorithm removed the -5, 5 level of implementing new modulation technique, the inverter the A-phase voltage corresponds to 1 faulty power cell. could continue to work with both short circuit and open Similarly, with phase B, for the period from 0.01 to circuit switches errors. 0.15 s, levels -5, -4, 4, 5 have been removed, 5. Conclusion and Further Development corresponds to 2 faulty cells. When there is no error handling algorithm, the modulated voltage waveform This paper has proposed a space vector UAN, UBN, UCN depicted in Fig. 9 from 0 to 0.05 modulation method for cascaded H-bridge inverter seconds. However, the real voltage on phase has lost a structure in case of power cell malfunction. The level with 1 faulty power cell, which causes the output proposed algorithm has achieved the following results. voltage to be unbalanced as shown in Fig 9. First, the faulty cell is bypassed so that the system can continue to work properly. Second, the output voltage Fig. 10 shows that with the error handling attenuation is minimized in comparison with the algorithm, the output voltage has the smallest drop. "bypass cell" method where cells are bypassed on all Specifically, in the time interval from 0.05s - 0.1s there three phases. In addition, the given algorithm ensures is 1 layer of faulty space voltage vectors, maximum the balance of three phases. Finally, the proposed output voltage compared to normal condition is 90%. method with optimized switching sequence can easily There are 5 faulty layers from 0.1s to 0.15s, the output be applied to cascaded H-bridge inverter with voltage reaches 50%. Fig. 11 and 13 show that the arbitrary-levels. The proposed method is verified by voltage waveform on the load UAZ, UBZ, UCZ and line numerical simulation using Matlab-Simulink. voltage UAB, UBC are perfectly balanced when an error occurs. When the algorithm for error handling is not Acknowledgments implemented, if an error occurs, the output voltage of the inverter will be unbalanced as shown in Figure 12, This research is funded by the Hanoi University 14. Particularly, with short circuit power switches of Science and Technology (HUST) under project error, DC power supply is short-circuited, causing number T2018-PC-050. 97
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