Research and build a soft microprocessor and ethernet interface using edk of xilinx

Nội dung text: Research and build a soft microprocessor and ethernet interface using edk of xilinx

1. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 RESEARCH AND BUILD A SOFT MICROPROCESSOR AND ETHERNET INTERFACE USING EDK OF XILINX Đặng Hồng Ngọc Quý1 Tưởng Thị Thu Hường1 Châu Thị Như Quỳnh1 Trần Anh Khôi1 Hoàng Minh Vũ1 ABSTRACT Processor is an integral part of automated metering and control systems. This article covers the fabrication of a soft microprocessor (microblaze) (32bit, on-chip block of RAM 64K, clock 50M, internal buses and peripheral buses) that receive Ethernet data packets, process and send the data packets back to the required station. This soft microprocessor is made from the EDK software tool's XPS (Xilinx), configured into the Xilinx XC3S500E FPGA on the Xilinx Spartan XC3S500 E board. The software operating the interface between the microprocessor and the Ethernet interface port written in C language and functioned as a HOST (station) has its own IP to connect to the Ethernet network. To perform data transmission, it requires an Ethernet cable supporting up to 100Mbs and the computer program that runs the data collection and communication with a soft microprocessor written in Labview. Keywords: EDK, soft microprocessor, Ethernet interface I. Introduction interface standards such as RS232, USB Currently, there are numerous types have been studied. However, Ethernet of soft processors that interface via interface which has not been studied ethermet such as PIC, Arduino. and applied in nuclear electronic However, with the purpose of devices at Dalat institite. transmitting and receiving data in the Nowadays, FPGA is a device which coincidence and multichannel system in has generally been used because its DaLat nuclear research institute which properties as follows: it can be are self-designed and manufactured on reconfigurated, it has a high flexibility FPGA. Instead of using external soft in design and fabrication. Owning to the processors, we use microblaze that are FPGA with the afore-mentioned available on FPGA chip to reduce properties, a generation of a specific computational time and simplifies processor playing a role of hardware as designs. In the framework of the topic, well as a firmware for control of in order to communicate with Ethernet hardware components is created inside via soft-processor, we had to use the the FPGA. XPS (support of C command set) to In the world, with the advancement generate hardware components and of FPGAs, a new trend of implementing software (firmware) of the soft- the microprocessors on the FPGAs has processor and an FPGA board named emerged in the design community. They Xilinx Spartan XC3S500E. implemens Gigabit Ethernet data In order to communicate devices transmission and reception in FPGA, with computers, parallel and serial using the embedded processor 1Viện nghiên cứu Hạt nhân Email: danghongngocquy@gmail.com 99
2. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 MicroBlaze [1] which is implemented The overall design is shown in on the evaluation board ML505 or Figure 1. The design of system is Spartan3 XC3S200-4 [2]. divided into two parts. Hardware part is The purpose of the article is design the 32-bit microprocessor while and fabricate a soft processor (called software part is a firmware. Both of microblaze) able to communicate with them are created by XPS from Xilinx Ethernet. This microblaze can be Company and integrated in a FPGA embedded into the FPGA by using the named XC3S500E board. supported XPS. Application program A product created through the running under window XP environment project is a transfer system including of: is written in LabView language to link the self-excuted application program and receive/transmit information running under PC, a modem and the between PC and the soft-processor. soft-processor as Figure1. II. Methods wifi FPGA Personal Modem computer Board Figure 1: The diagram of overall design A diagram of creating and Create a project from EDK: embedding a microblaze including Choose menu File -> new project, the software and hardware is shown as screen to create a new project appears follows as shown in Figure 2 below, clicking II.1. The methology of creating a OK to appear a small screen as shown Microblazer in Figure 2. To create a microblazer in FPGA, there are many steps to as follows Figure 2: Creating a new project 100
3. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 Figure 3: The directory of saving project In Figure 3, the user selects a directory to save the project and click OK. A screen appears as shown in Figure 4. Users choose Next to start designing a Microblaze. Figure 4: Creat a new Microblaze Choosing the type of board, brand and revision in Figure 5. 101
4. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 Figure 5: Screen to select the kit uses to create Microblaze After selecting the parameters as Select the frequency, capacity shown above, select Next to BRAM and Debug option suitable continue. A small screen asking to for the board we are using, then select a processor should appear. select Next. Figure 6: Window of Microblaze 8/16/32/64 bits II.2. A design methodology for sequentially according to the following soft-processor 5 steps: The process of creating a soft 1. Create soft processor with microprocessor is performed hardware and peripheral parameters: 102
5. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 32bit softwares, BRAM 64K, LMBs, 4. Creating the platform to have a PLBs, OPBs, Ethernet, 8 LEDs, RS232. core and netlists All are created in files * .MSS, * .MPD, 5. A collection of *.UCF, *.ED * .MHS files, core and netlists, use of iMPACT 2. Creating the library related to for creating *.Bit file, *.MCS file. the soft-processor and peripheral Finally, the MCS file will be loaded 3. Compiling firmware file and C- into ROM for operating. function library (mb-GCC), *.OUT file created Figure 7: The diagram paints all steps create and embed an FPGA soft-processor 103
6. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 The XPS has Wizard supporting After that, we carry out connection users how to design conveniently. In of input/output port with peripheral addition to creating a 32bit soft- (*.UCF file), producing address processor, 64K internal RAM, we can automatically, generating library also create more peripherals such as functions relating to microprocessor Ethernet, RS232, LEDs software and peripheral (Figure 8). Figure 8: Bus Interface of soft-processor II.3. The create of software design registers, cache Connection, (firmware) transferability in this project, we used Using the libraries were created TCP/IP protocol [3]. When the when we designed the hardware to firmware had received a TCP packet designed software (firmware). These from PC, the firmware performed the libraries support functions read/write packet and created a require package. 104
7. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 This package was sent to PC via to process Microblazer [4-5] and the Ethernet. algorithm flowchart of firmware is In this article, we using C describered in figure 9. language anđ some standard functions Start Receive ARP packet from LabView N IP = 192.168.1.108? Y Send MAC address to Labview N „S‟ character? Y Send 1460 bytes data to LabView Figure 9: The algorithm flowchart of firmware Firmware for Microblaze with program sends the "S" command and function as a server. In Firmware, set wait to receive 16,364 bytes of data the parameters necessary to connect to from the server, then end the the Ethernet network such as IP connection. The following is a detailed 192.168.1.108, MAC address 00: 0A: section on how to create data 35: 02: 22: 5E, PORT is 53326. The transmission systems over Ethernet. server sends data to the computer only III. Results when receiving get an "S" command In the project, using FPGA from LabVIEW. component named XC3S500E, 50MHz The application program with internal clock, LAN83C185 Ethernet LabVIEW as a client with a computer chip, 8 LEDS display, RS232 port, IP of 192.168.1.105, MAC 94: 39: E5: Platform Flash PROM (configure the 59: 0B: A3, PORT is 3363. The FPGA and program the soft-processor), 105
8. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 10/100 Mbs Ethernet port, USB for In order to check the accuracy of JTAG, MAC address is the programmed data packages, the Xilinx_02:22:5E (00:0A:35:02:22:5E) project team used wireshark software to MAC address of the computer is capture the data packets transferred HonHaiPr_59:0B:A3 through the computer network card. The (94:39:E5:59:0B:A3), IP is munber of the package is 1, 2, 3, 5, 6, 7, 192.168.1.105, PORT is 3363. 9, 10, 11, 12, respectively are Wireshark software is used to communication packets between capture all packets going through the labview and spartan 3E. computer network card that we can see in Figure 9. Figure 9: Data acquisition program 106
9. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 Figure 10: Connected, transmited, received frames captured in Wireshark Figure 11: The process of connecting, closing the connection and receiving a data packet In this program, microblaze acts as - No.5: Microblaze receives TCP a server, a PC is a client. PC uses packet [SYN] then returns TCP packet LabVIEW to connect to the server. [SYN, ACK] to confirm sending + VI "TCP open connection" method creates a handshake connection with - No.6: LabVIEW (192.168.1.105) microblaze as follows: sent to microblaze (192.168.1.108) TCP - No.1: LabVIEW sends an ARP packet [ACK] confirms connection breadcast packet asking which device completion has an IP of 192.168.1.108 + VI "TCP write" sends data to - No.2: Microblaze send to microblaze as follows: 192.168.1.105 (LabVIEW) that the - No.7: LabVIEW (192.168.1.105) network card on the xilinx board is sent to microblaze (192.168.1.108) TCP 192.168.1.108 and the MAC address is packet [PSH, ACK], len = 1, the letter 00: 0A: 35: 02: 22: 5E "S" tells microblaze LabVIEW wants to - No.3: LabVIEW (192.168.1.105) receive data sent to microblaze (192.168.1.108) TCP - No.9: Microblaze receives TCP packet [SYN] confirms the message packet [PSH, ACK] then returns TCP specification packet [ACK] confirms receipt of data 107
10. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 sending command and prepares data IV. Conclusion packet to send to LabVIEW A soft-processor is sucessfully + VI "TCP read" waiting to receive created including software and data from microblaze: hardware. The success of the project a - No.10: Microblaze new way for fabricating instruments. (192.168.1.108) sent to LabVIEW The advantages of this approach as (192.168.1.105) TCP packet [PSH, follows: ACK], len = 1460 bytes - Economics: not having to buy + VI "TCP close connection" sent hardware devices, small chip, small size to microblaze closed the connection: of ROM - No.11: LabVIEW (192.168.1.105) - Flexibility: design of 8, 16, 32, receives a packet that sends back 64 bits microcontroller, depending on microblaze (192.168.1.108) TCP packet demands, creating arbitrary RAM only [FIN, ACK] to close the connection changed the parameters on software, - No.12: Microblaze connecting with expected peripherals (192.168.1.108) receives the packet of easily ending connection and sends to - Convenience: embedded directly LabVIEW (192.168.1.105) the TCP into the FPGA and reusable [ACK] packet to report disconnection. - Compact: all of needed By capturing packets of information components was only inside FPGA transmitted between the device and the We also succeeded in firmware computer using Wireshark as mention- design for TCP/IP protocol transfer data above, the detailed information via Ethernet. This success will help displayed in the packets represents the remote measuring systems transfer data accuracy, integrity and correct sequence going further, faster and also help users of data. Microblaze and the FPGA remote control instruments interface circuits have functioned conveniently. properly. REFERENCES 1. Indu Raj, and Rejani Krishna, “FPGA Based Platforms for Ethernet Data Transfer”, International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE) Volume 3, Issue 1, January 2014 2. Anjali S S, Rejani Krishna P, Aparna Devi P S, “High Speed Data Transfer Using FPGA” International Journal of Engineering Research and General Science Volume 4, Issue 3, May-June, 2016. 3. E.Bryan Carne, A profession guide to Data Communication in a TCP/IP World, Artech House Publishers, London 4. Xilinx (2008), Embedded Development Kit EDK 10.1i, Xilinx Inc, USA 5. Xilinx (2010), XPS Ethernet Lite Media Access Controller, Xilin Inc, USA 108
11. TẠP CHÍ KHOA HỌC - ĐẠI HỌC ĐỒNG NAI, SỐ 20 - 2021 ISSN 2354-1482 NGHIÊN CỨU, XÂY DỰNG MỘT VI XỬ LÝ MỀM VÀ GIAO DIỆN ETHERNET SỬ DỤNG CÔNG CỤ PHẦN MỀM EDK (XILINX) TÓM TẮT Bộ xử lý là một thành phần không thể thiếu trong các hệ thống đo đạc và điều khiển tự động. Bài báo này đề cập đến việc chế tạo một vi xử lý mềm (microblaze) (32bit, on-chip block RAM 64K, clock 50M, các bus nội và bus ngoại vi) nhận gói dữ liệu Ethernet, xử lý và gửi gói dữ liệu trở lại trạm yêu cầu. Vi xử lý mềm này được chế tạo từ bộ XPS của công cụ phần mềm EDK (Xilinx), được cấu hình vào FPGA XC3S500E trên board mạch Xilinx Spartan XC3S500E. Phần mềm điều hành giao diện giữa vi xử lý và cổng giao diện Ethernet viết bằng ngôn ngữ C và có chức năng như một HOST (trạm), có IP riêng để kết nối với mạng Ethernet. Để thực hiện truyền nhận dữ liệu cần có cáp ethernet hỗ trợ tốc độ đến 100Mbs, chương trình máy tính điều hành việc thu nhận dữ liệu và giao tiếp với vi xử lý mềm viết bằng Labview. Từ khóa: EDK, vi xử lí mềm, Giao diện Ethernet (Received: 21/5/2020, Revised: 30/7/2020, Accepted for publication: 1/12/2020) 109